/*!
 * @file        main.c
 *
 * @brief       Main program body
 *
 * @version     V1.0.0
 *
 * @date        2023-03-31
 *
 * @attention
 *
 *  Copyright (C) 2023 Geehy Semiconductor
 *
 *  You may not use this file except in compliance with the
 *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
 *
 *  The program is only for reference, which is distributed in the hope
 *  that it will be useful and instructional for customers to develop
 *  their software. Unless required by applicable law or agreed to in
 *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
 *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
 *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
 *  and limitations under the License.
 */

/* Includes */
#include "main.h"

/** @addtogroup Examples
  @{
*/

/** @addtogroup TMR1_6stepswithTMR2
  @{
*/

/** @defgroup TMR1_6stepswithTMR2_Functions Functions
  @{
*/

/* OPT Init */
void FMC_OPT(void);
/* TMR1 Init */
void TMR1_Init(void);
/* TMR2 Init */
void TMR2_Init(void);
/*!
 * @brief       Main program
 *
 * @param       None
 *
 * @retval      None
 */
int main(void)
{
    FMC_OPT();
    APM_DelayInit(APM_DELAY_MS);

    TMR2_Init();
    TMR1_Init();
    while(1)
    {
        APM_Delay(100);
        TMR1_GenerateEvent(TMR1, TMR1_EVENT_TRIGGER);
    }
}

/*!
 * @brief       TMR1 Init
 *
 * @param       None
 *
 * @retval      None
 */
void TMR1_Init(void)
{
    TMR1_OCConfig_T ocConfigStruct;
    TMR1_TimeBaseConfig_T timeBaseConfig;

    /* Up-counter */
    timeBaseConfig.cntMode = TMR1_CNT_MODE_UP;
    /* Set counter = 500 */
    timeBaseConfig.count = 500;
    /* Set divider = 47.So TMR1 clock freq ~= 24/(47 + 1) = 500KHZ */
    timeBaseConfig.divider = 47;
    /* Repetition counter = 0x0 */
    timeBaseConfig.repetitionCount = 0;
    TMR1_ConfigTimerBase(TMR1, &timeBaseConfig);

    /* Select channen1 1 */
    ocConfigStruct.channel = TMR1_CHANNEL_1;
    /* Set compare value = 250 */
    ocConfigStruct.count = 250;
    /* PWM1 mode */
    ocConfigStruct.mode = TMR1_OC_MODE_PWM1;
    /* Idle State is reset */
    ocConfigStruct.OCxIdleState = TMR1_OC_IDLE_RESET;
    /* Idle State is reset */
    ocConfigStruct.OCxNIdleState = TMR1_OC_IDLE_RESET;
    /* Disable CH1N ouput */
    ocConfigStruct.OCxNOutputState = TMR1_OC_OUTPUT_DISABLE;
    /* Disable CH1 ouput */
    ocConfigStruct.OCxOutputState = TMR1_OC_OUTPUT_DISABLE;
    /* CH1N polarity is high */
    ocConfigStruct.OCxNPolarity = TMR1_OC_POLARITY_HIGH;
    /* CH1 polarity is high */
    ocConfigStruct.OCxPolarity = TMR1_OC_POLARITY_HIGH;
    TMR1_ConfigOutputCompare(TMR1, &ocConfigStruct);

    ocConfigStruct.channel = TMR1_CHANNEL_2;
    TMR1_ConfigOutputCompare(TMR1, &ocConfigStruct);

    ocConfigStruct.channel = TMR1_CHANNEL_3;
    TMR1_ConfigOutputCompare(TMR1, &ocConfigStruct);

    ocConfigStruct.channel = TMR1_CHANNEL_4;
    TMR1_ConfigOutputCompare(TMR1, &ocConfigStruct);

    /* Enable PWM output */
    TMR1_EnableOutputPWM(TMR1);

    TMR1_EnableInterrupt(TMR1, TMR1_INT_TRIGGER);

    NVIC_EnableIRQRequest(TMR1_UT_IRQn, 0);
    /* Enable TMR1  */
    TMR1_Enable(TMR1);
}

/*!
 * @brief       TMR2 Init
 *
 * @param       None
 *
 * @retval      None
 */
void TMR2_Init(void)
{
    TMR2_OCConfig_T ocConfigStruct;
    GPIO_Config_T gpio_struct;

    gpio_struct.pin = GPIO_PIN_3;
    gpio_struct.speed = GPIO_SPEED_10MHz;
    gpio_struct.mode = GPIO_MODE_OUT_PP;
    gpio_struct.intEn = GPIO_EINT_DISABLE;

    GPIO_Config(GPIOD, &gpio_struct);
    GPIO_Config(GPIOA, &gpio_struct);

    /* Set counter = 1500, divider = 4 */
    TMR2_ConfigTimerBase(4, 1500);

    /* Select channen1 3 */
    ocConfigStruct.channel = TMR2_CHANNEL_3;
    /* Set compare value = 750 */
    ocConfigStruct.count = 750;
    /* PWM1 mode */
    ocConfigStruct.mode = TMR2_OC_MODE_PWM1;
    /* Disable CH1 ouput */
    ocConfigStruct.OCxOutputState = TMR2_OC_OUTPUT_DISABLE;
    /* CH1 polarity is high */
    ocConfigStruct.OCxPolarity = TMR2_OC_POLARITY_HIGH;
    TMR2_ConfigOutputCompare(&ocConfigStruct);
    /* Select channen1 2 */
    ocConfigStruct.channel = TMR2_CHANNEL_2;
    TMR2_ConfigOutputCompare(&ocConfigStruct);

    /* Enable TMR2  */
    TMR2_Enable();
}

/*!
 * @brief       IO remapping
 *
 * @param       None
 *
 * @retval      None
 */
void FMC_OPT(void)
{
    if(OB->AFR & 0x01)
    {
        FMC_AFRConfig_T fmc_afr;
        FMC_Unlock();
        FMC_EraseOptionByte();
        fmc_afr.AFR0 = FMC_OB_AFR_ENABLE;
        fmc_afr.AFR1 = FMC_OB_AFR_DISABLE;
        fmc_afr.AFR3 = FMC_OB_AFR_DISABLE;
        fmc_afr.AFR4 = FMC_OB_AFR_DISABLE;
        fmc_afr.AFR5 = FMC_OB_AFR_DISABLE;
        fmc_afr.AFR7 = FMC_OB_AFR_DISABLE;
        FMC_ConfigOptionByteAFR(&fmc_afr);
        NVIC_SystemReset();
    }
}
/**@} end of group TMR1_6stepswithTMR2_Functions */
/**@} end of group TMR1_6stepswithTMR2 */
/**@} end of group Examples */
