/*!
 * @file        bmp561_hsc.h
 *
 * @brief       This file contains all the functions prototypes for the HSC firmware library
 *
 * @version     V1.0.0
 *
 * @date        2025-01-01
 *
 * @attention
 *
 *  Copyright (C) 2025 Geehy Semiconductor
 *
 *  You may not use this file except in compliance with the
 *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
 *
 *  The program is only for reference, which is distributed in the hope
 *  that it will be useful and instructional for customers to develop
 *  their software. Unless required by applicable law or agreed to in
 *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
 *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
 *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
 *  and limitations under the License.
 */

/* Define to prevent recursive inclusion */
#ifndef __BMP561_HSC_H
#define __BMP561_HSC_H

/* Includes */
#include "bmp561.h"

#ifdef __cplusplus
  extern "C" {
#endif

/** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
*/

/** @addtogroup HSC_Driver HSC Driver
  @{
*/

/** @addtogroup HSC_Enumerations Enumerations
  @{
*/

/**
 * @brief    HSC mode
 */
typedef enum
{
    HSC_MODE_SLAVE  = 0x00,    /*!< Slave mode */
    HSC_MODE_MASTER = 0x01     /*!< Master mode */
} HSC_MODE_T;


/**
 * @brief    HSC slave mode low level threshold value
 */
typedef enum
{
    HSC_THRETIME_1US   = 0x00,    /*!< 1us ~ 50us */
    HSC_THRETIME_17US  = 0x01,    /*!< 17us ~ 50us */
    HSC_THRETIME_32US  = 0x02,    /*!< 32us ~ 50us */
    HSC_THRETIME_0P5US = 0x03     /*!< 0.5us ~ 50us */
} HSC_THRETIME_T;

/**
 * @brief    HSC protocol data bit
 */
typedef enum
{
    HSC_PROTOCOL_8BIT  = 0x00,    /*!< 8 bit */
    HSC_PROTOCOL_16BIT = 0x01     /*!< 16 bit */
} HSC_PROTOCOL_T;

/**
 * @brief    HSC system clock
 */
typedef enum
{
    HSC_SYSCLK_4MHZ  = 0x00,    /*!< 4MHz system clock */
    HSC_SYSCLK_2MHZ  = 0x01,    /*!< 2MHz system clock */
    HSC_SYSCLK_8MHZ  = 0x02,    /*!< 8MHz system clock */
    HSC_SYSCLK_16MHZ = 0x03,    /*!< 16MHz system clock */
    HSC_SYSCLK_1MHZ  = 0x04     /*!< 1MHz system clock */
} HSC_SYSCLK_T;

/**
 * @brief    HSC interrupt source
 */
typedef enum
{
    HSC_INT_IBRK  = 0x01,    /*!< Break finished interrupt */
    HSC_INT_ICMD  = 0x02,    /*!< Read/write command finished interrupt */
    HSC_INT_IDATA = 0x04,    /*!< Send/Receive data finished interrupt */
    HSC_INT_FR    = 0x08,    /*!< Frame error interrupt */
    HSC_INT_TO    = 0x10     /*!< Timeout interrupt */
} HSC_INT_T;

/**
 * @brief    HSC flag
 */
typedef enum
{
    HSC_FLAG_BRK  = 0x01,    /*!< Break flag */
    HSC_FLAG_CMD  = 0x02,    /*!< Read/write command flag */
    HSC_FLAG_DATA = 0x04,    /*!< Send/Receive data flag */
    HSC_FLAG_FR   = 0x08,    /*!< Frame error flag */
    HSC_FLAG_TO   = 0x10,    /*!< Timeout flag */
    HSC_FLAG_BUSY = 0x20     /*!< Busy flag */
} HSC_FLAG_T;

/**@} end of group HSC_Enumerations */

/** @addtogroup HSC_Structure Data Structure
  @{
*/

/**
 * @brief    HSC Config structure definition
 */
typedef struct
{
    HSC_MODE_T       mode;       /*!< HSC mode */
    HSC_THRETIME_T   threshold;  /*!< Slave mode low level threshold value */
    HSC_PROTOCOL_T   bits;       /*!< Protocol data bit */
    uint8_t          brkEn;      /*!< Enable break, can be ENABLE or DISABLE. */
    HSC_SYSCLK_T     clock;      /*!< HSC system clock */
    uint8_t          timeout;    /*!< Enable timeout, can be ENABLE or DISABLE. */
    uint8_t          enable;     /*!< Enable HSC, can be ENABLE or DISABLE. */
    uint8_t          addr;       /*!< Configure 7 bits address. */
}HSC_Config_T;

/**@} end of group HSC_Structure*/

/** @addtogroup HSC_Functions Functions
  @{
*/

/** HSC common configuration */
void HSC_Reset(void);
void HSC_Enable(void);
void HSC_Disable(void);
void HSC_Start(void);
void HSC_EnableBreak(void);
void HSC_DisableBreak(void);
void HSC_ConfigMode(HSC_MODE_T mode);
void HSC_ConfigThreshold(HSC_THRETIME_T threshold);
void HSC_ConfigProtocolDataBits(HSC_PROTOCOL_T bits);
void HSC_ConfigSystemClock(HSC_SYSCLK_T sysClk);
void HSC_EnableTimeOut(void);
void HSC_DisableTimeOut(void);
void HSC_ConfigAddress(uint8_t Addr);
void HSC_ConfigReadWriteBit(uint8_t RWbit);
void HSC_WriteData(uint16_t value);
uint16_t HSC_ReadData(void);

/** HSC interrupt configuration */
void HSC_EnableInterrupt(HSC_INT_T interrupt);
void HSC_DisableInterrupt(HSC_INT_T interrupt);
uint8_t HSC_ReadFlag(HSC_FLAG_T flag);
void HSC_ClearFlag(HSC_FLAG_T flag);

/** HSC configuration */
void HSC_Config(HSC_Config_T* hdqConfig);
void HSC_ConfigStructInit(HSC_Config_T* hdqConfig);

/**@} end of group HSC_Functions*/
/**@} end of group HSC_Driver*/
/**@} end of group Peripherals_Library*/

#ifdef __cplusplus
}
#endif

#endif /* __BMP561_HSC_H */
