//#############################################################################
//
// FILE:    dccomp_ex1_single_shot_verification.c
//
// TITLE:   DCCOMP Single shot Clock verification
//
// VERSION: 1.0.0
//
// DATE:    2025-01-15
//
//! \addtogroup driver_example_list
//! <h1>DCCOMP Single shot Clock verification</h1>
//!
//! This program uses the XTAL clock as a reference clock to verify
//! the frequency of the PLLRAW clock.
//!
//! The Dual-Clock Comparator Module 0 is used for the clock verification.
//! The clocksource0 is the reference clock (Fclk0 = 20Mhz) and the
//! clocksource1 is the clock that needs to be verified (Fclk1 = 200Mhz).
//! Seed is the value that gets loaded into the Counter.
//!
//! Please refer to the TRM for details on counter seed values to be set.
//!
//! \b External \b Connections \n
//!   - None
//!
//! \b Watch \b Variables \n
//!  - \b status/result - Status of the PLLRAW clock verification
//!
//
//###########################################################################
// $Copyright:
// Copyright (C) 2024 Geehy Semiconductor - http://www.geehy.com/
// Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
//
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// 
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// 
//   Redistributions in binary form must reproduce the above copyright
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// 
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// 
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//
// Modifications:
// - 2024-09-13:
// 1. Modify some comments, macros, function names, and function contents.
//
//###########################################################################

//
// Included Files
//
#include "driverlib.h"
#include "device.h"

//
// Defines
//
#define PASS 0
#define FAIL 1

//
// Globals
//
uint32_t result = FAIL;

//
// Main
//
void example_main(void)
{
    bool status=0;

    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Initialize NVIC and clears NVIC registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the NVIC vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
    //
    EINT;
    ERTM;

    //
    // Verify the frequency of PLL clock using the XTAL as reference clock
    // FClk1 = PLLRAW frequency = 200MHz
    // FClk0 = XTAL frequency   = 20MHz
    // Tolerance = 1%
    // Allowable Frequency Tolerance = 0% (update as per the error in the XTAL frequency)
    // SysClk Freq = 200MHz
    //
    // Note: Update the parameters in case you are using different PLL or XTAL
    // frequencies,
    //
    status = DCCOMP_verifyClockFrequency(DCCOMP0_BASE,
                                         DCCOMP_COUNT1SRC_PLL, 200.0F,
                                         DCCOMP_COUNT0SRC_XTAL, 20.0F,
                                         1.0F, 0.0F, 200.0F);

    //
    // Status of the PLLRAW clock verification
    //
    if (!status)
    {
        result = FAIL;
    }
    else
    {
        result = PASS;
    }

    ESTOP0;

    while(1);
}

