#include "timer.h"

//volatile u32 duty_i=0;

AT(.com_rodata.isr)
const char str_3[] = "time3 is up_INTERRUPT Method!\r\n";

AT(.com_rodata.isr)
const char str_4[] = "time4 is up_INTERRUPT Method!\r\n";

AT(.com_rodata.isr)
const char str_5[] = "time5 is up_INTERRUPT Method!\r\n";

/*******************
//notes of function_isq():
1.Variables need to be declared add"volatile";
2.“printk” replace “printf";
3.Internal functions AT(.com_text.isr)
************************/
AT(.com_text.isr)
void timer3_isq(void)
{
    if (tmr_get_flag(TMR3, TMR_FLAG_UPDATE2) != RESET) {
        tmr_clear_flag(TMR3, TMR_FLAG_UPDATE2);

        printk(str_3);
    }
}

AT(.com_text.isr)
void timer4_isq(void)
{
    if (tmr_get_flag(TMR4, TMR_FLAG_UPDATE2) != RESET) {
        tmr_clear_flag(TMR4, TMR_FLAG_UPDATE2);

        printk(str_4);
    }
}

AT(.com_text.isr)
void timer5_isq(void)
{
    if (tmr_get_flag(TMR5, TMR_FLAG_UPDATE2) != RESET) {
        tmr_clear_flag(TMR5, TMR_FLAG_UPDATE2);

        printk(str_5);
    }
}
void timer3_init(u32 period)
{
    tmr_base_init_typedef tmr_base_init_struct;

    clock_gate1_cmd(CLOCK_GATE1_TMR3, ENABLE);

    tmr_base_init_struct.clock_source = TMR_INC_SOURCE;
    tmr_base_init_struct.increase_clock = TMR_COUNTER_RISING;
    tmr_base_init_struct.period = period;
    tmr_base_init_struct.pwm_mode = TMR_PWM_MODE_NULL;

    tmr_base_init(TMR3, &tmr_base_init_struct);

    tmr_pic_config(TMR3, timer3_isq, 0, TMR_IT_UPDATE2, ENABLE);


    tmr_cmd(TMR3, ENABLE);
}

void timer4_init(u32 period)
{
    tmr_base_init_typedef tmr_base_init_struct;

    clock_gate1_cmd(CLOCK_GATE1_TMR4, ENABLE);

    tmr_base_init_struct.clock_source = TMR_INC_SOURCE;
    tmr_base_init_struct.increase_clock = TMR_COUNTER_RISING;
    tmr_base_init_struct.period = period;
    tmr_base_init_struct.pwm_mode = TMR_PWM_MODE_NULL;

    tmr_base_init(TMR4, &tmr_base_init_struct);

    tmr_pic_config(TMR4, timer4_isq, 0, TMR_IT_UPDATE2, ENABLE);


    tmr_cmd(TMR4, ENABLE);
}

void timer5_init(u32 period)
{
    tmr_base_init_typedef tmr_base_init_struct;

    clock_gate1_cmd(CLOCK_GATE1_TMR5, ENABLE);

    tmr_base_init_struct.clock_source = TMR_INC_SOURCE;
    tmr_base_init_struct.increase_clock = TMR_COUNTER_RISING;
    tmr_base_init_struct.period = period;
    tmr_base_init_struct.pwm_mode = TMR_PWM_MODE_NULL;

    tmr_base_init(TMR5, &tmr_base_init_struct);

    tmr_pic_config(TMR5, timer5_isq, 0, TMR_IT_UPDATE2, ENABLE);


    tmr_cmd(TMR5, ENABLE);
}



